Books
- F. Yuan, Injection-locking in
mixed-mode signal processing, Springer, New York,
2019.
- F. Yuan (Ed), Low
Power Circuits for Emerging Applications in Communications, Computing and Sensing, CRC
Press, 2018.
- F. Yuan (Ed), CMOS Time-Mode Circuits : Principles
and Applications, CRC Press, ISBN 9781482298734, 2016.
- F. Yuan, CMOS
Circuits for Passive Wireless Microsystems, Springer, New York, 2010.
- F. Yuan, CMOS
Active Inductors and Transformers - Principle, Implementation, and Applications,
Springer, New York, 2008.
- F. Yuan, CMOS
Current-Mode Circuits for Data Communications, Springer, New York, 2006.
- F. Yuan and A. Opal, Computer methods for analysis of
mixed-mode switching circuits, Kluwer Academic Publishers, Boston,
2004.
Book Chapters
(Legends : Underlined authors : Students at the time of publication)
- Y. Zhou and F. Yuan, "Injection-locking techniques in low-power wireless systems," chapter
8, in IoT
and Low-Power Wireless: Circuits, Architectures, and Techniques, Ed. C. Siu. CRC
Press, 2018.
- F. Yuan, "All-digital noise-shaping time-to-digital converters for mixed-mode signal
processing," chapter 6, in IoT
and Low-Power Wireless: Circuits, Architectures, and Techniques, Ed. C. Siu. CRC
Press, 2018.
- F. Yuan, "Introduction of time-mode signal processing," chapter 1, in
CMOS Time-Mode Circuits : Principles and
Applications, Ed. F. Yuan. CRC Press, 2015.
- F. Yuan, "Voltage-to-time converters," chapter 2, in CMOS Time-Mode Circuits : Principles and
Applications, Ed. F. Yuan. CRC Press, 2015.
- F. Yuan, "Fundamentals of time-to-digital converters," chapter 3, in CMOS Time-Mode Circuits : Principles and
Applications, Ed. F. Yuan. CRC Press, 2015.
- F. Yuan,"Fundamentals of time-mode analog-to-digital converters," chapter 6, in CMOS Time-Mode Circuits : Principles and
Applications, Ed. F. Yuan. CRC Press, 2015.
- F. Yuan, "Fundamentals of time-mode phase-locked loops," chapter 8, in
CMOS Time-Mode Circuits : Principles and
Applications, Ed. F. Yuan. CRC Press, 2015.
- F. Yuan, "Time-mode temperature sensors," chapter 10, in CMOS Time-Mode Circuits : Principles and
Applications, Ed. F. Yuan. CRC Press, 2015.
- N. Soltani and F. Yuan, "Remote frequency calibration of passive
wireless microsystems," chapter 12, pp. 257-268, in Integrated
Microsystems: Electronics, Photonics, and Biotechnology, Ed. Kris
Iniewski, CRC Press, 2012.
- Y. Zhou and F. Yuan, "A frequency-domain study of injection-locking
of non-harmonic oscillators," pp. 92-97, in Image, Vision and Computing,
Ed. L. Xu, IACSIT Press, 2012.
- R. Smrai and F. Yuan, "An overview of design techniques for on-chip
eye-oening monitors of Gbps data links," pp.98-103, in Image, Vision and
Computing, Ed. L. Xu, IACSIT Press, 2012.
- F. Yuan, "CMOS active transformers and applications," chapter 9, pp.135-148, in
Circuits
at the Nanoscale : Communications, Imaging, and Sensing, Ed.
Kris Iniewski, CRC Press, June 2008.
Journal Papers
- F. Yuan, P. Parekh, and Y. Zhou, "Bi-directional gated ring oscillator
time integrator," IEEE Trans. Circuits Syst. I., Vol. 70, No.9, pp. 3461-3473,
Sept. 2023.
- P. Parekh, F. Yuan, and Y. Zhou, "Delta-sigma time-to-digital converter with
current-steering Vernier time integrator," Analog Integrated Circuits Sig.
Proc. (Springer), vol. 114, pp. 235-243, 2023.
- F. Yuan, "Bootstrapping techniques for energy-efficient successive approximation
ADC," Analog Integrated Circuits Sig. Proc. (Springer), vol. 114, 299-313, 2023.
- F. Yuan, "Metastability error correction for true single-phase clock DFF with
applications in Vernier TDC,'' IEEE Trans. Circuits Syst. II, Vol. 69, No. 11, pp. 4203-4207, Nov.
2022.
- F. Yuan, "Design techniques for voltage-to-time converters with nonlinearity emphasis,"
Analog Integrated Circuits Sig. Proc. (Springer), Vol. 111, pp. 371-386,
2022.
- P. Parekh, F. Yuan, and Y. Zhou, "Gated Vernier delay line time integrator with
applications in delta-sigma time-to-digital converter,"Microelectronics J.
(Elsevier), Vol. 119, Jan. 2022.
- P. Parekh, F. Yuan, and Y. Zhou, "Improved metastability of true single-phase clock
D-flipflops with applications in Vernier time-to-digital converters," IEEE Trans.
Circuits Syst. I, Vol. 69, No. 3, pp. 1102-1114, Mar. 2022.
- D. Lee, F. Yuan, and Y. Zhou, "All-digital successive approximation TDC in
time-mode signal processing," Microelectronics J. (Elsevier), Vol. 114, Oct. 2021.
- D. Lee, F. Yuan, G. Khan, and Y. Zhou, "A 8-bit digital-to-time converter with
pre-skewing and time interpolation," IET Circuits Devices Syst., Vol. 15, No. 7,
pp. 670-685, Oct. 2021.
- Y. Li and F. Yuan, "Adaptive data-transition decision feedback equalizer with
edge-emphasis," IET Circuits Devices Syst.. Vol. 15, No.4, pp. 340-352, July 2021.
- Y. Li and F. Yuan, "All-digital power-efficient integrating frequency
difference-to-digital converter for GHz frequency-locking," IET Circuits Devices
Syst., Vol. 14, No. 8, pp. 1153-1159, Dec. 2020.
- Y. Park and F. Yuan, "All-digital 1-1 MASH delta-sigma time-to-digital
converter
via time-mode signal processing," Analog Integrated Circuits Sig. Proc.
(Springer), Vol. 102, No. 2, pp. 427-443, Feb. 2020.
- F. Yuan and P. Parekh, "Time-based all-digital delta-sigma time-to-digital
converter with pre-skewed bi-directional gated delay line time integrator," IET Circuits
Devices Syst., Vol.14, No.1, pp.25-34, Jan. 2020.
- F. Yuan and P. Parekh, "All-digital delta-sigma time-to-digital converter via
time-mode signal processing" IEEE Trans. Circuits Syst. II, Vol. 67, No. 6, pp.
994-998, June
2020.
- Y. Li and F. Yuan, "Sign3-LMS data-transition decision feedback
equalizer," IET Circuits Devices Syst., Vol.13, No. 7, pp. 998-1006, 2019.
- F. Yuan and Y. Zhou, "Injection signaling in relaxation oscillators," Analog
Integrated Circuits Sig. Proc. (Springer), Vol. 100, No. 1, pp.
133-148, July 2019.
- Y. Park, P. Parekh, and F. Yuan, "All-digital delta-sigma
time-to-digital
converter with bi-directional gated delay line time integrator," Microelectronics
J. (Elsevier), Vol. 81, pp. 179-191, Nov. 2018.
- F. Yuan, "Design techniques of all-digital arithmetic units for time-mode signal
processing," IET Circuits Devices Syst., Vol.12, No. 6, pp. 753-763,
Nov. 2018.
- D. Jarret-Amor and F. Yuan, "Low-power frequency-to-voltage converter with
applications in injection-locked FLL," Analog Intgrated Circuits Sig. Proc.
(Springer), Vol.95, No.1, pp.53-65, Apr. 2018.
- F. Yuan and G. Khan "All-digital gated ring oscillator delta-sigma modulators," Analog Integrated
Circuits Sig. Proc. (Springer), Vol. 92, No. 3, pp. 483-488, 2017.
- Y. Park and F. Yuan, "Two-step pulse-shrinking
time-to-digital converter," Microelectronics J. (Elsevier),
Vol.60, pp.45-54, Feb. 2017.
- A. Al-Taee, M. Dolan, and F. Yuan, "An edge-based dual
adaptive decision feedback equalizer for Gbps serial links,'' Analog
Integrated Circuits Sig. Proc. (Springer), Vol.90, No.2,
pp.399-409, Feb. 2017.
- Y. Park and F. Yuan, "Time-interleaved pulse-shrinking
time-to-digital converter with reduced conversion time," Analog Integrated
Circuits Sig. Proc. (Springer), Vol.91, No. 3, pp. 385-398, June
2017.
- A. Al-Taee, F. Yuan,and A. Ye, "Adaptive decision feedback
equalizer with hexagon EOM and bang-bang jitter detection," Circuits
Devices, Sig. Proc. (Springer), Vol. 35, No. 7, pp. 2487-2501, Sept. 2015.
- X. Lai and F. Yuan, "Calibration technique for maximum power
harvest of passive wireless microsystems," Circuits, Devices, Sig.
Proc. (Springer), Vol. 35, No. 7, pp. 2283-2297, Setpt. 2015.
- Y. Zhou, N. Filiol, and F. Yuan, "Current reuse quadrature
charge-domain sampling mixer with embedded FIR, IIR, and N-path filters,"
IEEE Trans. Circuits Syst. I, Vol. 62, No. 5, pp.
1431-1440, May 2015.
- F. Yuan and D. DiClemente, "Hybrid voltage-controlled oscillator
with low phase noise and large frequency tuning range," Analog Integrated
Circuits Sig. Proc. (Springer), Vol. 82, No. 2,
pp. 471-478, 2015.
- Y. Zhou and F. Yuan, "Study of injection-locked non-harmonic
oscillators using Volterra series," IET Circuits Devices Syst..
Vol. 9, No. 2, pp. 119-130, Mar. 2015.
- A. Al-Taee, F. Yuan, and A. Ye, "Minimum jitter adaptive decision
feedback equalizer for Gbps serial links," IET J. Eng.,
pp. 1-7, 2015.
- F. Yuan,"Adaptive decision feedback equalization for multi-Gbps serial links:
challenges and opportunities," Int'l J. Sensor Networks Data Comm. (Omics),
Vol.5, No.1, pp.1-5, 2015.
- F. Yuan,"CMOS time-to-digital converters for mixed-mode signal processing,"
IET J. Eng., pp.1-15, Apr. 2014.
- F. Yuan, "Design techniques for time-mode noise-shaping analog-to-digital
converters : a state-of-the-art review," Analog Integrated Circuits Sig.
Proc. (Springer), Vol.79, No.2, pp. 191-206, May 2014.
- A. Al-Taee, F. Yuan, and A. Ye, "An improved RC model for VLSI interconnects
with its applications to buffer insertion," Analog Integrated Circuits Sig.
Proc. (Springer), Vol.79, No.1, pp. 105-113, Apr. 2014.
- Y. Zhou and F. Yuan, "Cascaded charge-domain sampling mixer with
embedded 3rd-order sinc FIR and 4-Path filters for software-defined radio,'' IET
Electronics Lett., Vol.50, No.3, pp. 216-218, Jan. 2014.
- F. Yuan, A. Al-Taee, A. Ye, and S. Sadr, "Design techniques for decision
feedback equalization of multi-Gbps serial data links : a state-of-the-art review," IET
Circuits Devices Syst., Vol.8, No.2, pp. 118-130, 2014.
- A. Al-Taee, F. Yuan, A. Ye, and S. Sadr, "New 2D eye-opening
monitor for Gbps serial links," IEEE Trans. VLSI Syst., Vol.22, No.6, pp. 1209-1218, June 2014.
- X. Lai and F. Yuan, "Passive voltage shifters for analog
signaling," IET Circuits Devices Syst., Vol.7, No. 3, pp. 141-149, May 2013.
- A. Al-Taee, F. Yuan, and A. Ye, "A power-efficient 2-dimensional on-chip
eye-opening monitor for Gbps serial links," Analog Integrated Circuits Sig.
Proc. (Springer), Vol. 76, No. 1, pp. 117-128, July 2013.
- F. Yuan and Y. Zhou, "Frequency-domain study of lock range of non-harmonic
oscillators with multiple multi-tone injections," IEEE Trans. Circuits Syst. I, Vol. 60, No. 6, pp.
1395 - 1406, May 2013.
- A. Tang, G. Zhu, and F. Yuan, "Current-mode phase-locked loop with
constant-Q active-inductor CCO and active transformer loop filter," Analog Integrated
Circuits Sig. Proc. (Springer), Vol. 74, No. 2, pp. 365-375, 2013.
- Y. Zhou and F. Yuan, "Design techniques for high-speed I/Os: challenges and
opportunities," J. Elec. Electron. Syst. (Omics), Vol.3, No.1, pp.1-5, Dec. 2013.
- X. Lai and F. Yuan, "Negative voltage level shift in clamping
circuits for passive wireless microsystems," Analog Integrated Circuits Sig.
Proc. (Springer), Vol. 73, No. 3, pp 973-979, Dec. 2012.
- F. Yuan and Y. Zhou, " A phasor-domain study of lock range of
harmonic oscillators with multiple injections," IEEE Trans. Circuits
Syst. II, Vol.59, No.8, pp. 466-470, Aug. 2012.
- A. Al-Taee, F. Yuan, and A. Ye, "A new power-efficient
CDMA-based transmitter for high-speed serial links," Analog Integrated
Circuits Sig. Proc. (Springer), Vol.71, No.2, pp.1-7, Feb. 2012.
- G. Zhu, F. Yuan, and G. Khan "Time-mode approach for mixed analog-digital
signal
processing," J. Elec. Electron. Syst. (Omics), Vol. 1, No. 4, pp.1-4. Dec.
2012.
- F. Yuan, "Remote calibration of passive wireless microsystems - challenge and
opportunity," J. Elec. Electron. Syst. (Omics). Vol. 1, No. 2, pp.1-4, May 2012.
- Y. Zhou and F. Yuan, "A study of lock range of injection-locked
CMOS active-inductor oscillators using a linear control system approach," IEEE
Trans. Circuits Syst. II. Vol. 58, No. 10,
pp. 627-631, Oct. 2011.
- N. Soltani and F. Yuan, "A high-gain power-matching technique for
efficient radio-frequency power harvesting of passive wireless transponders," IEEE
Trans. Circuits Syst. I, Vol.57, No. 10, pp.
2685-2695, Sept. 2010.
- N. Soltani and F. Yuan, "Non-Harmonic Injection-Locked
Phase-Locked Loops with Applications in Remote Frequency Calibration of Passive
Wireless Transponders," IEEE Trans. Circuits Syst. I, Vol. 57, No. 12, pp.2381-2393, Sept. 2010.
- F. Yuan, "Design techniques for ASK demodulators of passive wireless
microsystems - a state-of-the-art review," Analog Integrated Circuits Sig.
Proc. (Springer). Vol.63, No.1, pp. 33-45, 2010.
- F. Yuan, "A high-speed differential CMOS Schmitt trigger with regenerative
current feedback and adjustable hysteresis," Analog Integrated Circuits Sig.
Proc. (Springer), Vol.63, No.1, pp. 121-127, 2010.
- N. Soltani and F. Yuan, "A step-up transformer impedance transformation
technique for efficient power harvesting of passive transponders," Microelectronics
J. (Elsevier), Vol.41, pp.75-84, 2010.
- F. Yuan, "Differential CMOS Schmitt Trigger with Tunable Hysteresis,"
Analog Integrated Circuits Sig. Proc. (Springer). Vol.62, No.2, pp.245 - 248,
Feb. 2010.
- A. Hu and F. Yuan, "CMOS active transformers and their applications in
voltage-controlled quadrature oscillators," Analog Integrated Circuits Sig.
Proc. (Springer), Vol. 62, No. 1, pp. 83-90, Jan. 2010.
- A. Hu and F. Yuan, "Parallel links with current-mode incremental signaling and
per-pin skew compensation," Microelectronics J. (Elsevier), Vol. 40, No. 11,
pp. 1623-1631, Nov. 2009.
- A. Hu and F. Yuan, "Inter-signal timing skew compensation of parallel links
with current-mode incremental signaling," IET Circuits Devices Syst., Vol.3 ,
No.5, pp. 268-279, 2009.
- A. Tang, F. Yuan, and E. Law, "CMOS active transformers and their application in
voltage-controlled quadrature oscillators,'' Analog Integrated Circuits Sig. Proc. (Springer),
Vol. 61,
No.1, pp.83-90, 2009.
- F. Yuan and N. Soltani, "A low-voltage low VDD sensitivity relaxation oscillator for passive
wireless microsystems," IET Electronics Lett., vol. 45, no. 21, pp.1057-1058, Oct.
2009.
- Y. Chen, F. Yuan, and G. Khan, "A wide dynamic range CMOS PFM digital pixel
sensor with in-pixel variable reference voltage," Analog Integrated Circuits Sig.
Proc. (Springer), Vol.61, No.3, pp. 287-299, 2009.
- Y. Chen, F. Yuan, and G. Khan, "A wide dynamic range CMOS image sensor with
pulse-frequency-modulation and in-pixel amplification," Microelectronics J.
(Elsevier), Vol.40, pp.1496-1501, 2009.
- A. Hu and F. Yuan, "A new parallel link interface with current-mode incremental signaling and
per-pin skew compensation," Analog Integrated Circuits Sig. Proc. (Springer), Vol.60, No.1,
pp.117-125,
Aug. 2009.
- F. Yuan, "An area-power efficient 4-PAM full-clock 10Gb/s CMOS pre-emphasis serial link transmitter,"
Analog Integrated Circuits Sig. Proc. (Springer). Vol.59, No.3, pp. 257-264,
June 2009.
- A. Hu and F. Yuan, "Inter-signal timing skew compensation of parallel links with voltage-mode
incremental signaling," IEEE Trans. Circuits Syst. I, Vol.56, No.4,
pp.773-783, Apr. 2009.
- A. Tang, F. Yuan, and E. Law, "A new constant-Q active inductor with applications in low-noise
oscillator,'' Analog Integrated Circuits Sig. Proc. (Springer). Vol. 58, No. 1, pp.77-80, Jan.
2009.
- D. DiClemente, F. Yuan, and A. Tang, "Current-mode phase-locked loops with CMOS
active transformers," IEEE Trans. Circuits Syst. II,
Vol.55, No. 8, pp.771-775, Aug. 2008.
- F. Yuan and T. Wang, "CMOS current-mode integrating receiver for Gbytes/s parallel
links," Microelectronics J. (Elsevier), vol.39, pp.1156-1165, Aug. 2008.
- A. Tang, F. Yuan, and E. Law, "A new CMOS active transformer QPSK modulator with
optimal bandwidth control," IEEE Trans. Circuits Syst. II, Vol.55, No. 1, pp. 11-15, Jan. 2008.
- J. Li and F. Yuan, "A new hybrid phase detector for reduced lock time and timing
jitter of phase-locked loops," Analog Integrated Circuits Sig. Proc. (Springer). Vol.
56, No. 3, Sept. 2008.
- F. Yuan, "CMOS gyrator-C active transformers," IEE Proc. Part G - Circuits
Devices Syst., Vol.1, No.6, pp.494-508, Dec. 2007.
- F. Yuan and M. Li, "A power-area efficient CMOS 4-PAM Class AB current-mode
pre-emphasis serial link transmitter," Analog Integrated Circuits Sig.
Proc. (Springer), Vol.51, No.2, pp. 210-220, May 2007.
- D. DiClemente and F. Yuan, "Current-mode phase-locked loops : a new architecture,"
IEEE Trans. Circuits Sys. II, Vol. 54, No. 4, pp. 303
- 307, Apr. 2007.
- T. Wang and F. Yuan, "A new current-mode incremental signaling scheme with
applications to Gb/s parallel links," IEEE Trans. Circuits Syst. I, Vol.54, No.2, pp. 255-267, Feb.
2007.
- F. Yuan and M. Li, "A new CMOS class AB serial link transmitter with low supply
voltage sensitivity," Analog Integrated Circuits Sig. Proc. (Springer), Vol.49, No.2,
pp. 171-180, Nov. 2006.
- F. Yuan, "Low voltage CMOS current mode circuits - topology and characteristics," IEE
Proc. Part G - Circuits Devices Syst., Vol. 153, No. 3, pp. 219-230, June
2006.
- F. Yuan, "A modified Park-Kim voltage-controlled ring oscillator for multi-Gbps serial
links," Analog Integrated Circuits Sig. Proc. (Springer), Vol.47, No. 3, pp. 345-353,
June 2006.
- F. Yuan, "A fully differential VCO cell with active inductors for Gbps serial links,"
Analog Integrated Circuits Sig. Proc. (Springer), Vol. 47, No. 2, pp.213-223, May
2006.
- J. Jiang and F. Yuan, "A new CMOS class AB transmitter for 10 Gbps serial links,"
Analog Integrated Circuits Sig. Proc. (Springer), Vol. 47, No. 2, pp.103-112, May
2006.
- F. Yuan, "Low-voltage CMOS current-mode pre-amplifier: analysis and design," IEEE
Trans. Circuits Syst. I, Vol.53, No.1, pp.26-39, Jan.
2006.
- F. Yuan and J. Jiang, "0.18um CMOS 10 Gb/s current-mode serial link
transmitters," IEICE Trans. Infor. Syst., Vol.
E88, No. 8, pp. 1863-1869, Aug. 2005.
- B. Sun, F. Yuan, and A. Opal, "A new differential CMOS current-mode pre-amplifier
for Gbps data communication," Analog Integrated Circuits Sig. Proc. (Springer), Vol.
44, No. 3, pp. 191-201, Sept. 2005.
- J. Jiang and F. Yuan, "A new CMOS current-mode multiplexer for 10Gbps serial
links," Analog Integrated Circuits Sig. Proc. (Springer), Vol. 44, No. 1, pp.61-76,
July 2005.
- F. Yuan, "Fully differential 8-to-1 current-mode multiplexer for 10 Gbps
serial links in 0.18um CMOS," IEE Electronics Lett., Vol. 40, No. 13,
pp. 789-790, June 2004.
- F. Yuan, "A CAD-based investigation of clock-skew hazards in pipelined NORA
dynamic logic circuits," Analog Integrated Circuits Sig. Proc. (Springer),
Vol.40, No.1, pp. 103-108, July 2004.
- B. Sun and F. Yuan, "A new inductor series-peaking technique for bandwidth
enhancement of CMOS current-mode circuits," Analog Integrated Circuits Sig.
Proc. (Springer), Vol. 37, No.3, pp. 259-264, Dec. 2003.
- Q. Li and F. Yuan, "Time domain response and sensitivity of periodically
switched nonlinear circuits," IEEE Trans. Circuits Syst. I, Vol. 50, No. 11, pp. 1436-1446, Nov.
2003.
- F. Yuan and A. Opal, "Computer methods for switched circuits," IEEE
Trans. Circuits Syst. I,
Vol. 50, No. 8, pp. 1013-1024, Aug. 2003.
- F. Yuan, "An efficient non-Monte Carlo method for statistical analysis of
switched linear circuits," IEE Proc. Part G - Circuits Devices
Syst., Vol. 150, No. 5, pp. 423-428, Oct. 2003.
- F. Yuan and A. Opal, "An efficient transient analysis algorithm for mildly
nonlinear circuits," IEEE Trans. CAD Integrated
Circuits Syst., vol. 21, No. 6, pp. 662-673, June 2002.
- F. Yuan, "An efficient sampled-data simulation method for transient analysis
of
nonlinear circuits," IEE Proc. Part G - Circuits Devices
Syst., vol. 149, No. 2, pp. 105-111, Apr. 2002.
- F. Yuan and A. Opal, "Distortion analysis of periodically switched nonlinear
circuits using time-varying Volterra series," IEEE Trans. Circuits
Syst. I, vol. 48, No. 6, pp. 726-738,
June 2001.
- F. Yuan and A. Opal, "Adjoint network of periodically switched linear
circuits
with applications to noise analysis," IEEE Trans. Circuits Syst. I, vol. 48, No. 2, pp. 139-151,
Feb.
2001.
- F. Yuan and A. Opal, "Noise and sensitivity analysis of periodically switched
linear circuits in frequency domain," IEEE Trans. Circuits Syst. I, vol. 47, No. 6, pp. 986-998, July
2000.
- F. Yuan, "Analysis of stochastic behavior of linear circuits using first
order
second moment and adjoint network techniques," IEE Electronics Lett., vol.
33, No. 9, pp. 766-768. 1997.
- F. Yuan and R. Pal, "Measurement of solids concentration in aqueous
slurries using a microwave technique," Chemical Eng.
Sci., vol. 50, No. 22, pp. 3525-3533, 1995.
- F. Yuan, "Design of
self-adaptive dynamic decoupling systems," J. Changzhou Institute Tech. (Natural Sci. Ed.).
Vol.2, No.2, pp.46-57, 1988.
- F. Yuan, "The
sensitivity to the parameters of the Smith estimator," Process Automation Instrumentation, Vol. 9, No. 10, pp.
13-19, 1988.
Conference Papers
- W. Wu, F. Yuan, and Y. Zhou ``Sub-threshold delay-locked loop with piecewise
linearization and time-mode proportional-integral locking," IEEE Asia-Pacific Conf. Circuits
Syst., 2024, Taipei, accepted for publication.
- W. Wu, F. Yuan, and Y. Zhou ``A 0.6-V 108-nW 100-kHz sub-threshold
delay-locked
loop with digital linearization for low-power SAR ADC,'' IEEE MWSCAS 2024, Springfield, MA,
accepted for publication.
- F. Yuan,``"Edge-triggered bi-directional gated delay line up-down counters",''
IEEE MWSCAS 2024, Springfield, MA,
accepted for publication.
- F. Yuan, ``A comparative study of dynamic comparators in low-voltage SAR ADC,''
IEEE MWSCAS 2024, Springfield, MA,
accepted for publication.
- F. Yuan, ``Design techniques for sample-and-hold with bootstrapping in low-power
SAR ADC,'' IEEE NEWCAS 2024, Sherbrooke, Que., Canada,
accepted for publication.
- F. Yuan, ``Gated ring oscillator time amplifier with pico-second sensitivity and
applications in all-digital variable-gain time integrator,'' IEEE ISCAS 2024, Singapore,
accepted for publication.
- I. Perczak and F. Yuan, ``An 800 kS/s 1.83 fJ/conv. 12b ADC via voltage
successive approximation and gated cyclic Vernier time digitization,'' IEEE ISCAS 2024,
Singapore, accepted for publication.
- I. Perczak and F. Yuan, ``A 3.97 uW 11.2b 500 kS/s hybrid SAR ADC via
time-mode signal processing,'' Proc. IEEE MWSCAS, pp. 472-476, Phoenix, Arizona,
2023.
- D. Lee, F. Yuan, and Y. Zhou, ``Cyclic Vernier digital-to-time converter
for time-mode successive approximation TDC,'' Proc. IEEE MWSCAS, pp. 468-471, Phoenix,
Arizona, 2023.
- D. Lee, F. Yuan, and Y. Zhou, ``Time-interpolated Vernier digital-to-time
converter with applications in time-mode SAR TDC,'' Proc. IEEE NEWCAS, pp.1-5,
Edinburgh, UK, 2023.
- F. Yuan, ``Gated ring oscillator time amplifier with applications in time
integration,'' Proc. IEEE NEWCAS, pp. 1-4, Edinburgh, UK, 2023.
- F. Yuan, "All-digital time integrator with bi-directional gated ring oscillator /
shift register," Proc. IEEE ISCAS, pp. 1-5, Monterey, CA, 2023.
- F. Yuan, ``Performance limits of gated delay line time integrators,''
Proc. IEEE CCECE, pp. 213-218, Halifax, NS, 2022.
- P. Parekh, F. Yuan, and Y. Zhou, ``Bi-directional gated ring oscillator time
integrator for time-based mixed-signal processing,'' Proc. IEEE MWSCAS, pp. 1-4, Fukuoka, Japan,
Aug. 2022.
- P. Parekh, F. Yuan, and Y. Zhou, "All-digital bi-directional gated ring oscillator time integrator for
mixed-mode signal processing," Proc. NEWCAS, pp. 25-29, Quebec City, Que, 2022.
- F. Yuan, "Metastability correction techniques for TSPC-DFF with applications in Vernier
TDC," Proc. IEEE ISCAS, pp. 1-4, Austin, TX, 2022.
- D. Lee, F. Yuan, and Y. Zhou, "Successive approximation register TDC in time-mode
signal processing," Proc. IEEE MWSCAS, pp. 945-948, East Lansing, MI,
2021.
- P. Parekh, F. Yuan, and Y. Zhou, "Gated Vernier delay line time integrator for
time-mode signal processing," Proc. IEEE MWSCAS, pp. 1082-1085, East
Lansing, MI, 2021.
- F. Yuan, "Bootstrapping techniques for energy-efficient SAR
ADCs : a state-of-the-art review," Proc. IEEE MWSCAS, pp. 575-578, East
Lansing, MI, 2021.
- D. Lee, F. Yuan, and Y. Zhou, "All-digital successive approximation TDC in
time-mode signal processing," Proc. IEEE ISCAS, pp. 1-4, Daegu,
Korea, 2021 (The Best Student Paper Award).
- P. Parekh, F. Yuan, and Y. Zhou, "All-digital time integrator using
bi-directional gated Vernier delay line," Proc. IEEE MWSCAS, pp.
331-324, Springfield,
MA, 2020.
- P. Parekh, F. Yuan, and Y. Zhou, "Area/power-efficient true-single-phase-clock
D-flipflops with improved metastability," Proc. IEEE MWSCAS, pp.
182-185, Springfield,
MA, 2020.
- R. Siddiqui, F. Yuan, and Y. Zhou, "A 500-MS/s 8.4-ps double-edge successive
approximation TDC in 65 nm CMOS," Proc. IEEE MWSCAS, pp. 770-773, Dallas, TX, 2019.
- D. Lee, F. Yuan, G. Khan, "All-digital delta-sigma TDC with current-starved
digitally interpolated pre-skewed delay-line digital-to-time converter with minimum
nonlinearity and latency," Proc. IEEE MWSCAS, pp. 892-895, Dallas, TX, 2019.
- F. Yuan and P. Parekh, "All-digital delta-sigma TDC with current-starved
bi-directional gated delay line time integrator," Proc. IEEE MWSCAS, pp. 493-496,
Dallas, TX, 2019.
- Y. Li and F. Yuan, "A pre-skewed bi-directional gated delay line bang-bang
frequency detector with applications in 10 Gbps serial link frequency-locking," Proc. IEEE
MWSCAS, pp. 263-266, Dallas, TX, 2019.
- F. Yuan and P. Parekh, "Time-mode all-digital delta-sigma time-to-digital
converter with process uncertainty calibration," Proc. IEEE MWSCAS, pp. 489-492, Dallas,
TX, 2019.
- Y. Li and F. Yuan, "Data-transition decision feedback equalizer with
edge-emphasis taps and raised references," Proc. IEEE NEWCAS, pp. 1-4, Munich, Germany,
2019.
- D. Lee, F. Yuan, and G. Khan, "Architectures and design techniques of digital
time interpolators," Proc. IEEE Int'l Conf. Integrated Circuits and Microsyst., pp.
15-20, Shanghai, 2018.
- F. Yuan and P. Parekh, "All-digital DS TDC with
multipath pre-skewed
gated delay line time integrator," Proc. IEEE Int'l Conf. Integrated Circuits
Microsyst., pp. 10-14, Shanghai, 2018.
- M. Obaidullah, G. Khan and F. Yuan, "Multi-swarm based NoC configuration and
synthesis," Proc. IEEE NORCHIP, pp.1-6, 2018.
- Y. Zhou, J. Mercier, and F. Yuan, "A comparative study of injection locked frequency
divider using harmonic mixer in weak and strong inversion," Proc. IEEE MWSCAS, pp.97-100,
Windsor, ON, 2018..
- P. Parekh and F. Yuan,"Power-silicon efficient all-digital DS TDC with
differential gated delay line time integrator," Proc. IEEE NEWCAS,
pp.191-194, Montreal, Que, 2018.
- Y. Li and F. Yuan, "Data-transition decision feedback equalizer with S3-LMS
adaptation algorithm," Proc. IEEE NEWCAS, pp.221-224, Montreal, Que., 2018.
- Y. Li and F. Yuan, "Data-transition decision feedback equalizer with edge-emphasis
taps," presented at IEEE ISCAS, Florance, Italy, as a "breaking
news" paper, 2018.
- P. Parekh and F. Yuan, "Power efficient all-digital DS
TDC with
differential gated delay line time integrator," Proc. IEEE Int'l Conf. Integrated Circuits
Microsyst., pp. 23-27, Nanjing, China, 2017 (Best Paper Presentation Award).
- M. Dolan and F. Yuan, "Low-power adaptive edge decision feedback equalizer for
serial
links with 4PAM signaling," Proc. IEEE Int'l Conf. Integrated Circuits
Microsyst., pp. 115-119, Nanjing, China, 2017.
- F. Yuan, "Design techniques of all-digital time integrators for time-mode
signal processing," Proc. IEEE Int'l Conf. Integrated Circuits
Microsyst., pp. 272-276, Nanjing, China, 2017.
- Y. Li and F. Yuan, "Adaptive data-transition decision feedback
equalizer for serial links," Proc. IEEE MWSCAS, pp. 1609-1612, Boston, MA, 2017.
- Y. Park and F. Yuan, "All-digital DS TDC with
differential
bi-directional gated-delay-line time integrator," Proc. IEEE MWSCAS, pp. 1513-1516, Boston, MA, 2017.
- Y. Li and F. Yuan, "Data-transition adaptive decision feedback
equalizer for 2/4 PAM
serial links," Proc. IEEE MWSCAS, pp.
531-534, Boston, MA, 2017.
- Y. Park and F. Yuan, "1-1 MASH DS time-to-digital
converter with differential
cascode time integrator," Proc. IEEE MWSCAS, pp. 1005-1008, Boston, MA, 2017.
- Y. Park and F. Yuan, "Low-power all-digital DS TDC with
bi-directional gated
delay line time integrator," Proc. IEEE MWSCAS, pp. 679-682,
Boston, MA, 2017.
- M. Dolan and F. Yuan, "An adaptive edge decision feedback
equalizer
with 4 PAM
signalling,"
Proc. IEEE MWSCAS, pp. 297-300,
Boston, MA, 2017.
- Y. Zhou and F. Yuan, "Adaptive 4 PAM decision feedback equalizer with
reduced number of
slicers," Proc. IEEE MWSCAS,
pp. 775-778, Boston, MA, 2017.
- D. Jarrett-Amor and F. Yuan, "Data transient insensitive
phase-locked loops," Proc. IEEE NEWCAS, pp. 1-4,
Vancouver, BC, 2016.
- F. Yuan, "A phasor-domain study of injection-locking of harmonic
oscillators
with multiple injections," Proc. IEEE NEWCAS, pp. 1-4,
Vancouver, BC, 2016.
- D. Jarrett-Amor, Y. J. Park and F. Yuan, "Time-mode
techniques for
fast-locking phase-locked loops," Proc. IEEE ISCAS, pp. 1790-1793, Montreal, Que, 2016.
- Y. J. Park, D. Jarrett-Amor and F. Yuan, "Time Integrator for
Mixed-Mode Signal Processing," Proc. IEEE ISCAS, pp. 816-829, Montreal, Que, 2016.
- G. Zhu, F. Yuan and G. Khan, "A 0.13 um½m CMOS 5-MHz BW
47-dB SNDR all-digital time-mode first-order delta-sigma ADC with
3-bit gated VCO quantizer," Proc. Int'l Conf. Elec.
Electronics Eng., pp. 29-32, Bursa, Turkey, 2015.
- Y. J. Park and F. Yuan, "0.3-76.8 ns 1.18 GS/s 22.5 nW/step
8-bit stage-interleaved pulse-shrinking time-to-digital converter in 130 nm
CMOS," Proc. IEEE MWSCAS, pp.1-4, 2015.
- Y. J. Park and F. Yuan, "0.25-4 ns 714 MS/s 5.25 uW/step
4-bit pulse-shrinking time-to-digital converter in 130 nm CMOS using a
2-step conversion scheme," Proc. IEEE MWSCAS,
pp. 1-4,
2015.
- A. Al-Taee, F. Yuan, and A. Ye,"Minimum jitter adaptive decision
feedback equalizer for 4 PAM serial links," Proc. IEEE ISCAS, pp. 2868-2871, 2015.
- A. Al-Taee, F. Yuan, and A. Ye "A new adaptive decision feedback
equalizer using hexagon eye-opening monitor for multi Gbps data links," Proc.
IEEE ISCAS, pp. 2137-2140, Melbourne, Australia,
2014.
- A. Tino, G. Khan, and F. Yuan, "Hardware realization of GALS based
cortical column systems," Proc. NASA/ESA Conf. Adaptive Hardware Syst., pp.144-149, 2013.
- A. Tino, G. Khan, and F. Yuan, "Towards Hardware Realizations of
Intelligent Systems: A Cortical Column Approach ," Proc. Int'l Conf. Parallel
Processing, pp. 492-497, 2013.
- A. Al-Taee, F. Yuan, and A. Ye "Two-dimensional eye-opening monitor
for serial links," Proc. IEEE MWSCAS, pp. 181-184,
Columbus, 2013.
- X. Lai and F. Yuan, "Remote calibration of wireless power
harvest ," Prof. IEEE MWSCAS, pp. 501-504, Columbus, 2013.
- A. Al-Taee, F. Yuan, and A. Ye "A new simple RC modeling for on-chip
interconnects with its applications to buffer insertion," Proc. SIECPC,
pp.1-4, 2013.
- A. Al-Taee, F. Yuan, and A. Ye "A new CDMA transmitter for
high-speed serial links," Proc. SIECPC, pp.1-4, 2013
- Y. Zhou, N. Filiol, and F. Yuan, "Low-power programmable charge-domain
sampling mixer with embedded N-path bandpass filter for software-defined radio," Proc.
IEEE ISCAS, pp. 1934-1937, Beijing, China, 2013.
- X. Lai and F. Yuan, "Passive voltage level shifters for analog
signaling," Proc. IEEE NEWCAS, pp. 481-484, Montreal, Que, Aug.
2012.
- Y. Zhou and F. Yuan, "A frequency-domain study of lock range of
harmonic oscillators with multiple injections," Proc. IEEE NEWCAS, pp.29-32, Montreal, Que., Aug.
2012.
- G. Khan, Jack Yu, and Fei Yuan, "XTEA based Secure Authentication
Protocol for RFID Systems" Proc. Int'l Conf. Computer Comm.
Networks, pp.1-6, Hawai, August 2011.
- X. Lai and F. Yuan, "A power-efficient dual-tank FSK demodulator for passive
microsystems," Proc. IEEE MWSCAS, Seoul, South Korea, pp.1-4, Aug. 2011.
- X. Lai and F. Yuan, "An ultra-low power voltage level shifter for
passive wireless microsystems," Proc. IEEE MWSCAS, pp. 1-4, Seoul, South Korea, Aug. 2011.
- X. Lai and F. Yuan, "A comparative study of low-power CMOS Gilbert mixers in
weak and strong inversion," Proc. IEEE MWSCAS, pp. 1-4, Seoul, South Korea, Aug.
2011.
- J. Yu, G. Khan, and F. Yuan, "A novel XTEA based authentication protocol for RFID
systems," Proc. URSI General Assembly and Scientific Symp. , pp. 1-6, 2011
- J. Yu, G. Khan, and F. Yuan, "XTEA encryption based novel RFID security
protocol," Proc. IEEE CCECE, pp.58-62, 2011.
- Y. Zhou and F. Yuan, "A comparative study of lock range of injection-locked
active-inductor oscillators," Proc. IEEE MWSCAS, pp.793-796, Seattle, WA, August 2010.
- Y. Zhou and F. Yuan, "Subthreshold CMOS active inductors with applications to low-power
injection-locked oscillators for passive wireless microsystems," Proc. IEEE MWSCAS, pp.885-888,
Seattle, WA, August 2010.
- D. DiClemente and F. Yuan, "A passive transformer voltage-controlled oscillator with
reflected impedance frequency tuning," Proc. IEEE MWSCAS, pp.80-83,
Seattle, WA, August 2010.
- F. Yuan, "Design Techniques for Remote Frequency Calibration of Passive Wireless Microsystems,"
Proc. IEEE MWSCAS, pp. 244-247, Seattle, WA, August 2010.
- D. DiClemente and F. Yuan, "A passive transformer voltage-controlled
oscillator with active inductor frequency tuning for ultra wideband applications," Proc.
Microsystems and Nanoelectronics Research Conf., pp.80-83, Ottawa, ON, Oct. 2009.
- N. Soltani and F. Yuan, "Remote frequency calibration of passive wireless
transponders using injection-locked PLL," Proc. Microsystems and Nanoelectronics
Research Conf., pp.1-4, Ottawa, ON, Oct. 2009.
- F. Yuan, "Injection-locked CMOS active transformer voltage-controlled oscillators," Proc.
IEEE MWSCAS, pp.114-117, Cancun, Mexico, Aug. 2009.
- F. Yuan, "Current regenerative Schmitt triggers with tunable hysteresis,"
Proc. IEEE MWSCAS, pp.110-113, Cancun, Mexico, Aug. 2009.
- N. Soltani and F. Yuan,"Remote frequency calibration of passive
wireless microsensors using injection-locked PLL," Proc. IEEE ISCAS, pp.541-544, Taipei, May 2009.
- D. DiClemente and F. Yuan,"Ultra-wide tuning range
voltage-controlled oscillator," Proc. IEEE ISCAS,
pp.2097-2100, Taipei, May 2009.
- N. Soltani and F. Yuan, "An autotransformer impedance transformation
technique for efficient power harvesting of passive transponders and wireless
microsensors," Proc. IEEE MWSCAS, pp. 755-758, Knoxville,
TN, Aug. 2008.
- A. Tang, F. Yuan, and E. Law, "CMOS active transformer current-mode
sigma-delta modulators," Proc. IEEE MWSCAS. pp. 625-628,
Knoxville, TN, Aug. 2008.
- Y. Chen, F. Yuan, and G. Khan, "A new wide dynamic range CMOS
pulse-frequency-modulation digital image sensor with in-pixel variable reference voltage,"
Proc. IEEE MWSCAS, pp.129-132, Knoxville, TN, Aug. 2008.
- F. Yuan and N. Soltani, "Design techniques for power harvesting of passive
wireless microsensors," Proc. IEEE MWSCAS, pp.289-293,
Knoxville, TN, Aug. 2008.
- Y. Chen, F. Yuan, and G. Khan, "A 2-stage memory write scheme for CMOS
pulse-width-modulation digital pixel sensors," IEEE MWSCAS, pp.125-128, Knoxville, TN, Aug. 2008.
- F. Yuan, "A new current-integrating bang-bang phase detector for clock and data
recovery," Proc. IEEE MWSCAS, pp. 898-901, Knoxville, TN, Aug.
2008.
- A. Hu and F. Yuan, "Inter-signal timing skew compensation of parallel links with
current-mode incremental signaling," Proc. IEEE MWSCAS, pp.
494-498, Knoxville, TN, Aug. 2008.
- A. Tang, F. Yuan, and E. Law, "A New WiMax Sigma-Delta Modulator with Constant-Q
Active Inductors," Proc. IEEE ISCAS, pp.1304-1307, Seattle, WA.,May
2008.
- A. Tang, F. Yuan, and E. Law, "Low-noise CMOS active transformer
voltage-controlled oscillators," Proc. IEEE MWSCAS, pp.1441-1444,
August 2008.
- A. Hu and F. Yuan, "Inter-signal timing skew compensation of parallel links with
voltage-mode incremental signaling," Proc. IEEE ISCAS,
pp.1740-1743, Seattle, WA, May 2008.
- A. Tang, F. Yuan, and E. Law, "CMOS Class AB Active Transformers with Applications
in LC Oscillators," Proc. IEEE Int'l Symp. Signals, Systems and Electronics, pp.501-504,
Montreal, Que, Aug. 2007.
- J. Li and F. Yuan, "A new bang-bang phase/frequency detector for fast locking of
phase-locked loops," Proc. IEEE MWSCAS, pp.1521-1523, Montreal, Que,
Aug. 2007.
- D. DiClements, F. Yuan, and A. Tang, "CMOS active transformer current-mode
phase-locked loops," Proc. IEEE MWSCAS, pp.1528-1531, Montreal, Que,
Aug. 2007.
- A. Hu and F. Yuan, "A new parallel link interface with current-mode incremental
signaling and per-pin skew compensation," Proc. IEEE MWSCAS,
pp.1457-1460, Montreal, Que, Aug. 2007.
- A. Tang, F. Yuan, and E. Law, "Low-noise CMOS active transformer
voltage-controlled oscillators," Proc. IEEE MWSCAS,
pp.1441-1444, Montreal, Que, Aug. 2007.
- D. DiClemente and F. Yuan, "Current-mode phase-locked loops with low supply
voltage sensitivity," Proc. IEEE ISCAS, pp. 2172 - 2175, New Orleans,
May 2007.
- F. Yuan, "CMOS gyrator-C active transformers," Proc. IEEE ISCAS,
pp.3812 - 3815, New Orleans, May 2007.
- A. Tang, F. Yuan, and E. Law, "A new CMOS BPSK modulator with optimal transaction
bandwidth control," Proc. IEEE ISCAS, pp.2550 - 2553, New Orleans, May
2007.
- T. Wang and F. Yuan, "A new CMOS current integrating receiver for Gbyte/s parallel
links," Proc. IEEE MWSCAS, Vol.1, pp. 230-233, Aug. 2006.
- D. DiClemente and F. Yuan, "Current-mode phase-locked loops," Presented at CMC
Microsystems Annual Symposium, Ottawa, ON, Oct. 2006 (Second Place Award).
- A. Tang, F. Yuan, and E. Law, "A new 2.4GHz CMOS low-noise amplifier with
automatic gain control," Proc. IEEE MWSCAS, Vo.2, pp. 200-203,
Aug. 2006.
- D. DiClemente and F. Yuan, "An area-efficient CMOS current-mode phase-locked
loop," Proc. IEEE MWSCAS. Vol.2, pp.574-578, Aug. 2006.
- F. Yuan, "A new power-area efficient 4-PAM full-clock CMOS pre-emphasis transmitter for
10Gb/s serial links," Proc. IEEE Great Lakes Symp. Circuits Syst., Philadelphia, pp.
127-130, Apr. 2006.
- M. Li and F. Yuan, "A 0.13um CMOS 10 Gb/s current-mode class AB serial link
transmitter with low supply voltage sensitivity," Proc. IEEE Great Lakes Symp. Circuits
Syst., Philadelphia, pp. 63-66, Apr. 2006.
- F. Yuan and M. Li, "A new area-efficient 4-PAM 10 Gb/s CMOS serial link
transmitter," Proc. IEEE ISCAS, pp.4030-4033, Kos, Greece, May 2006.
- T. Wang and F. Yuan, "A new current-mode incremental signaling scheme with
applications to Gb/s parallel links," Proc. IEEE ISCAS, pp.
4026-2029, Kos, Greece, May 2006.
- T. Wang and F. Yuan, "A novel current-mode incremental signaling scheme for
high-speed parallel links," Proc. IEEE MWSCAS, pp.1802-1806,
Cincinnati, Aug. 2005.
- M. Li and F. Yuan, "A new fully differential 4-PAM current-mode transmitter for 10
Gbps serial links in 0.13um CMOS," Proc. IEEE MWSCAS, pp.
1665-1668. Cincinnati, Aug.2005.
- F. Yuan, "Analysis of phase noise of saturated ring oscillators," Proc. IEEE MWSCAS, pp. 1577-1580. Cincinnati,
USA, Aug.2005.
- F. Yuan, "A fully differential VCO cell with active inductor load for Gbps serial links,"
Proc. IEEE NEWCAS, pp. 202-205, Quebec City, Que, May
2005.
- Q. Li and F. Yuan, "Analysis of continuous-time over-sampled sigma-delta modulator
with excess loop delay," Proc. IEEE NEWCAS, pp. 206-209,
Quebec City, Que, May 2005.
- F. Yuan, T. Wang, and M. Li, �4-PAM current-mode incremental signaling fr
high-speed links,½ Proc. Micronet R&D Annual Workshop, pp. 29-30, Ottawa, ON, 2004.
- J. Jiang and F. Yuan, "A new CMOS class-AB transmitter for 10 Gbps serial
links," Proc. IEEE MWSCAS,
vol.3, pp.319-322,
Hiroshima, Japan, August, 2004.
- F. Yuan and J. Jiang, "A pseudo-nMOS fully differential CMOS
current-mode multiplexing transmitter for 10 Gb/s serial links," Proc.
IEEE MWSCAS, vol. 1, pp. 77-80,
Hiroshima,
Japan, August 2004.
- F. Yuan, "Power sensitivity of low-voltage CMOS current-mode circuits," in
Proc.
IEEE CCECE, vol. 3, pp.
1741-1744,
Niagara Falls, ON, May 2004.
- M. El-Hage and F. Yuan, "An overview of low-voltage VCO delay cells and a
worst-case analysis of supply noise sensitivity," Proc. IEEE CCECE, vol. 3, pp. 1785-1788, Niagara
Falls, ON, May 2004.
- J. Jiang and F. Yuan, "A new differential CMOS current-mode multiplexer for Gbps
serial links," Proc. IEEE CCECE, vol.3, pp. 1665-1668,
Niagara Falls, ON, 2004.
- B. Sun, F. Yuan and A. Opal, "Inductive peaking in wideband CMOS current
amplifiers," Proc. IEEE ISCAS, vol. 4, pp.
285-288, Vancouver, BC, May 2004.
- S. Ardalan, F. Yuan and K. Raahemifar, "Delay reduction in static CMOS
circuits," Proc. European Conf. Circuit Theory and Design. Accepted for
publication, 2003.
- S. Ardalan, K. Raahemifar, and F. Yuan "1.2V, 100Msample/sec pipelined
analog-to-digital converter," Proc. IEEE NEWCAS, Montreal, Que, May 2003.
- S. Ardalan, F. Yuan and K. Raahemifar, "Low-power techniques for delay reduction in static CMOS circuits," Proc.
IEEE NEWCAS, Montreal, Que, May 2003.
- S. Ardalan, K. Raahemifar, F. Yuan, and V. Geurkov, "Read-Solomon
encoder and decoder design, simulation and synthesis," Proc. CCECE, vol. 1, pp. 255-258,
Montreal, Que, May
2003.
- M. El-Hage and F. Yuan, "Architectures and design considerations of CMOS
charge
pumps for phase-locked loops," Proc. IEEE CCECE, Vol. 1, pp. 223-226, Montreal, Que, May 2003.
- B. Sun and F. Yuan, "A new series-peaking technique for bandwidth enhancement of
CMOS current-mode circuits," Proc IEEE CCECE, vol. 1, pp.
215-218, Montreal, Que, May 2003.
- Q. Li and F. Yuan, "Sampled-data simulation of periodically switched nonlinear
circuits," Proc. IEEE CCECE, vol. 1, pp. 219-222, Montreal, Que,
May 2003.
- B. Sun and F. Yuan, "A new differential CMOS current pre-amplifier for optical
communication," Proc. IEEE ISCAS, vol. 1, pp. 341-344, Bangkok,
Thailand, May 2003.
- Q. Li and F. Yuan, "Time domain response and sensitivity of periodically
switched nonlinear circuits," Proc. IEEE ISCAS, Vol. 4, pp. 696-699, Bangkok,
Thailand, May 2003.
- B. Sun and F. Yuan, "A new low-voltage wide-band fully differential current
amplifier," Proc. IEEE MWSCAS, Vol. 2, pp. 57-60,
Tulsa, Oklahoma, August 2002.
- F. Yuan and B. Sun, "A comparative study of low-voltage CMOS current-mode
circuits for optical communication," Proc. IEEE MWSCAS, Vol. 1, pp. 315-319, Tulsa, Oklahoma, August 2002.
- S. Ardalan, K. Raahemifar, and F. Yuan,"Low voltage, low power operational
amplifier," Proc. Int'l Conf. Electronics, Circuits Syst.,
Vol. 2, pp. 822 - 825, Dec. 2003.
- S. Ardalan, K. Raahemifar, and F. Yuan "Low voltage cascode amplifier,"
Proc. IEEE MWSCAS, Vol. 1, pp. 267-270,
Tulsa, Oklahoma, Aug. 2002.
- F. Yuan, "Statistical analysis of switched linear circuits," Proc. IEEE
Int'l
Symp. Circuits Syst., Vol. 1, pp. 549-552, Scottsdale, Arizona,
May 2002.
- S. Soliman, F. Yuan, and K. Raahemifar, "An overview of design techniques
for
CMOS phase detector," Proc. IEEE ISCAS,
Vol. 5, pp. 457-460, Scottsdale, Arizona, May 2002.
- F. Yuan, "Statistical analysis of switched linear circuits," Proc. IEEE
ISCAS, vol. 1, pp. 549-552, Scottsdale, Arizona,
May 2002.
- F. Yuan and A. Opal, "A unified sampled-data simulation method for
nonlinear
circuits-response, parameter sensitivity, and stochastic behavior," Proc. IEEE
MWSCAS, Dayton, Ohio, Vol. 1,
pp. 28-32, August 2001.
- K. Raahemifar, F. Yuan, and F. Mohammadi, "A new initialization technique in
designing and testing phases of asynchronous circuits," Proc. Int'l Conf. Electronics,
Circuits Syst., Vol.3, pp. 1557 - 1560, 2001.
- G. Puree, V. Punia, and F. Yuan, "An investigation of clock-race conditions in NORA
dynamic CMOS circuits," Proc. IEEE CCECE, Vol.1,
pp. 595-599, 2001.
- K. Raahemifar, F. Yuan, and F. Mohammadi, "A new initialization
technique for
asynchronous circuits," Proc. IEEE CCECE, Vol. 2, pp.
1099-1104, 2001.
- F. Yuan and S. Ariebi, "Minimization of area and power of CMOS
combinational circuits using a modified simulated annealing technique,"
Proc. Int'l Conf. Info. Syst., Analysis, Synthesis, Orlando,
July 2001.
- F. Mohammadi, K. Raahemifar, and F. Yuan, "Numerical study on the performance of GaAs
MESFET-like oscillator," Proc. IEEE CCECE, Vol. 2, pp.
897-900, 2001.
- F. Yuan, M. Youssef and Y. Sun, "Efficient modeling and analysis of clock
feed-through and charge injection of switched-current circuits," Proc. IEEE
CCECE, Toronto, Vol.1,
pp. 573-578, May
2001.
- F. Yuan, "Statistical analysis of nonlinear current-mode circuits," Proc. of CCECE,
Toronto, Vol.1, pp. 579-582, May 2001.
- F. Yuan, K. Raahemifar, and F. A. Mohammadi, "Efficient transient analysis of
nonlinear circuits using Volterra series and piecewise constant interpolation,"
Proc. IEEE ISCAS, Sydney, Australia, Vol.2,
pp. 819-822,
May 2001.
- F. Yuan, "Analysis of stochastic behavior of switched linear networks," Proc. of CCECE, Halifax, vol.1, pp.
569-573, May 2000.
- F. Yuan, "On the periodicity of network functions of periodically switched
linear and nonlinear circuits," Proc. CCECE, Halifax, Vol. 1, pp. 574-577, May 2000.
- F. Yuan and A. Opal, "Distortion analysis of periodically switched nonlinear
circuits," Proc. IEEE ISCAS, Vol. 5,
pp. 449-502, Orlando, May 1999.
- F. Yuan and A. Opal, "Sensitivity analysis of periodically switched linear
circuit using an adjoint network technique," Proc. IEEE ISCAS, Vol. 5, pp. 331-334, Orlando, May 1999.
- F. Yuan and A. Opal, "Noise analysis of periodically switched linear
circuits,"
Proc. of IEEE CCECE, Vol.
1,
pp. 153-156,
Waterloo, May 1998.
- F. Yuan and A. Opal, "Adjoint network of periodically switched linear
circuits,"
Proc. of IEEE ISCAS, Vol. 6, pp. 298-301,
Monterey, CA, May 1998.
- F. Yuan and R. Pal, "Composition measurement of emulsions and emulsions with
added solids using a microwave technique," Proc. CIM Petroleum Conf., pp. 1-16,
Regina, 1995.